Since the phase-locked loop (PLL) circuit was proposed in the 1930s, it is being used for a lot of situations when precise frequency\nand phase references are required. Among these applications, synchronous telecommunication networks experienced a strong\ndevelopment in order to support the explosive information traffic that the modern society demands. Consequently, bandwidth\nbecame a decisive parameter, implying higher and higher frequencies for the clock signals exchanged between the nodes of\nthe networks and detected by PLLs. The necessity to improve clock precision that follows the bandwidth increase provoked\nthe improvement of the filter component of the PLLs, avoiding instability and high-frequency components in the reference\nsignals. Here, a technique of designing this kind of filter is presented, considering second-order filters, implying third-order PLLs.\nSimulations show that following this technique produces very fast tracking processes, enabling precise operation even for very high\nfrequencies.
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